The Fetch-Execute Cycle
Stored program computers are designed to fetch, decode and execute instructions in a continuous cycle. This is known as the fetch-execute cycle.
- The Program Counter (PC) contains the address of the next instruction to be fetched
- The address contained in the PC is copied to the Memory Address Register (MAR).
- The instruction is copied from the memory location contained in the MAR and placed in the Memory Buffer Register (MBR).
- The entire instruction is copied from the MBR and placed in the Current Instruction Register (CIR)
- The PC is incremented so that it points to the next instruction to be fetched
- The address part of the instruction is placed in the MAR
- The instruction is decoded and executed
- The processor checks for interrupts (signals from devices or other sources seeking the attention of the processor) and either branches to the relevant interrupt service routine or starts the cycle again.
The following presentation shows the way that registers are used during the fetch-execute cycle. Save the file to your computer before loading it up. Advance the slideshow by clicking the mouse. There is a lot of information on the screen and you will get the best out of this demonstration by taking your time and making sure that you can clearly see what has happened before moving on.
fedemo.ppt by C Traynier